V 51
K 419708849300 INV
Y 0
D 0 0 1700 1100
Z 1
i 18
I 18 MISC:OUTPUT 1 930 600 0 1 '
C 5 1 9 0
I 16 MISC:INPUT 1 640 600 0 1 '
C 7 1 8 0
N 13
J 840 464 2
J 840 460 3
J 840 464 2
S 2 1
S 2 3
N 10
J 840 734 2
J 840 730 3
J 840 734 2
S 2 1
S 2 3
I 2 MISC:SHEET_B 1 0 0 0 1 '
L 0 0 10 0 3 0 1 0 x1i2
I 9 SOURCES:VDD 1 820 734 0 1 '
C 10 1 4 0
I 12 SOURCES:VSS 1 820 424 0 1 '
C 13 1 1 0
N 7
J 670 610 2
J 760 610 5
J 760 684 3
J 760 514 3
J 780 684 2
J 780 514 2
S 4 2
S 3 5
S 2 3
S 4 6
S 1 2
L 710 610 10 0 9 0 1 0 A
N 5
J 930 610 2
J 840 610 5
J 840 634 2
J 840 564 2
S 4 2
S 2 3
S 2 1
L 880 610 10 0 9 0 1 0 Z
U 1400 60 20 0 3 3 @NAME=DTI_GEN_INV
Q 14 3 0
U 1420 20 20 0 3 3 @DATETIME=7-12-2018_22:50
Q 14 3 0
I 3 DEVICES:PMOS 1 780 634 0 1 '
L 780 634 10 0 3 0 1 0 m1i3
A 810 699 10 0 9 3 M
A 820 709 10 0 9 1 L=LP
A 821 717 10 0 9 1 W=WP
C 5 3 14 0
A 840 669 10 3 1 3 #=3
C 7 5 12 0
A 780 684 10 0 3 3 #=2
C 10 3 15 0
A 840 699 10 1 1 3 #=1
I 4 DEVICES:NMOS 1 780 464 0 1 '
L 780 464 10 0 3 0 1 0 m1i4
A 810 524 10 0 9 3 M
A 819 536 10 0 9 1 L=LN
A 818 547 10 0 9 1 W=WN
C 13 3 17 0
A 840 499 10 3 1 3 #=3
C 7 6 12 0
A 780 514 10 0 3 3 #=2
C 5 4 16 0
A 840 529 10 1 1 3 #=1
E
